View LTM8022EVPBF_4943889.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ltm8022 1 8022fd features applications description 1a, 36v dc/dc module the ltm ? 8022 is a complete 1a, dc/dc step-down power supply. included in the package are the switching controller, power switches, inductor, and all support components. operating over an input voltage range of 3.6v to 36v, the ltm8022 supports an output voltage range of 0.8v to 10v, and a switching frequency range of 200khz to 2.4mhz, each set by a single resistor. only the bulk input and output ? lter capacitors are needed to ? nish the design. the low pro? le package (2.82mm) enables utilization of unused space on the bottom of pc boards for high density point of load regulation. the ltm8022 is packaged in a thermally enhanced, compact (11.25mm 9mm) and low pro? le (2.82mm) overmolded land grid array (lga) package suitable for automated assembly by standard surface mount equipment. the ltm8022 is rohs compliant. 7v in to 36v in , 5v/1a module ? regulator n complete step-down switch mode power supply n wide input voltage range: 3.6v to 36v n 0.8v to 10v output voltage n 1a output current n adjustable switching frequency: 200khz to 2.4mhz n current mode control n (e4) rohs compliant package with gold pad finish n programmable soft-start n tiny, low pro? le (11.25mm 9mm 2.82mm) surface mount lga package n automotive battery regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation ef? ciency and power loss ltm8022 8022 ta01a share rt v in * 7v to 36v v out 5v 1a 2.2f 4.7f 93.1k *running voltage range. please refer to applications information for start-up details 29.4k aux run/ss v in gnd adj sync pg bias v out load current (a) 0.001 100 v in = 12v efficiency power loss 90 80 70 60 50 40 30 0.8 0.6 0.7 0.5 0.4 0.3 0.2 0.1 0 8022 ta01b 0.01 0.1 1 efficiency (%) power loss (w) l , lt, ltc, ltm, linear technology, burst mode and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. typical application
ltm8022 2 8022fd pin configuration absolute maximum ratings v in , run/ss voltage .................................................40v adj, r t , share, voltage ............................................5v v out , aux .................................................................10v sync, pg ..................................................................30v bias ..........................................................................16v v in + bias .................................................................56v internal operating temperature..............?40c to 125c solder temperature ............................................... 250c storage temperature ..............................?55c to 125c (note 1) gnd (bank 3) v out (bank 2) aux v in (bank 1) r t h b ad lga package 50-lead (11.25mm s 9mm s 2.82mm) c 6 7 5 1 2 3 4 efg adj bias run/ss share pg sync t jmax = 125c,
ltm8022 3 8022fd electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm8022e is guaranteed to meet performance speci? cations from 0c to 85c ambient. speci? cations over the full C40c to 85c ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm8022i is guaranteed to meet speci? cations over the full C40c to 85c ambient operating temperature range. the ltm8022mp is guaranteed to symbol parameter conditions min typ max units v in input dc voltage l 3.6 36 v v out output dc voltage 0v < i out < 1a, r adj open 0v < i out < 1a, r adj = 43.2k 0.8 10 v v r adj(min) minimum allowable r adj (note 3) 42.2 k i out(max) continuous output dc current 4v < v in < 36v, c out = 51f (note 4) 0 1 a iq vin v in quiescent current v run/ss = 0.2v, r t = 174k v bias = 3v, not switching, r t = 174k (e, i) v bias = 3v, not switching, r t = 174k (mp) v bias = 0v, not switching, r t = 174k l l 0.1 25 25 85 0.5 60 350 120 a a a a iq bias bias quiescent current v run/ss = 0.2v, r t = 174k v bias = 3v, not switching, r t = 174k (e, i) v bias = 3v, not switching, r t = 174k (mp) v bias = 0v, not switching, r t = 174k l l 0.03 50 50 1 0.5 120 200 5 a a a a 6 v out /v out line regulation 3.6v < v in < 36v, i out = 1a, v out = 3.3v 0.1 % 6 v out /v out load regulation v in = 24v, 0v < i out < 1a, v out = 3.3v, c out = 51f 0.4 % v out(ac_rms) output ripple (rms) v in = 24v, i out = 1a, v out = 3.3v, c out = 51f 10 mv f sw switching frequency r t = 113k, c out = 51f 325 khz i sc(out) output short-circuit current v in = 36v, v out = 0v (note 5) 3 a v adj voltage at adj pin c out = 51f l 765 790 805 mv v bias(min) minimum bias voltage for proper operation 1.9 2.4 v i adj current out of adj pin adj = 1v, c out = 51f 2 a i run/ss run/ss pin current v run/ss = 2.5v 5 10 a v ih(run/ss) run/ss input high voltage c out = 51f 2.5 v v il(run/ss) run/ss input low voltage c out = 51f 0.2 v v pg(th) pg threshold v fb rising 730 mv i pgo pg leakage v pg = 30v 0.1 1 a i pg(sink) pg sink current v pg = 0.4v 200 800 a v sync(il) sync low threshold f sync = 550khz, c out = 51f 0.5 v v sync(ih) sync high threshold f sync = 550khz, c out = 51f 0.7 v i sync(bias) sync pin bias current v sync = 0v 0.1 a the l denotes the speci? cations which apply over the full operating temp- erature range, otherwise speci? cations are at t a = 25c. v in = 10v, v run/ss = 10v, v bias = 3v, r t = 60.4k, c in = 2.2f, c out = 4.7f, unless otherwise speci? ed. (note 2) meet speci? cations over the full C55c to 125c temperature range. note that the maximum internal temperature is determined by speci? c operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: guaranteed by design. note 4: c out = 51f is composed of a 4.7f ceramic capacitor and a 47f electrolytic. note 5: short circuit current at v in = 36v is guaranteed by characterization and correlation. 100% tested at v in = 10v.
ltm8022 4 8022fd typical performance characteristics ef? ciency vs load (8v out ) ef? ciency vs load (5v out ) ef? ciency vs load (3.3v out ) minimum required input voltage vs output voltage, i out = 1a output start-up waveform v in = 36v, 5v out , i out = 1a output start-up waveform v in = 36v, 3.3v out , i out = 1a input current vs output current (8v out ) input current vs output current (5v out ) input current vs output current (3.3v out ) (t a = 25 c, unless otherwise noted) output current (a) 0.1 70 efficiency (%) 75 85 90 95 0.3 0.5 0.6 1.0 8022 g01 80 0.2 0.4 0.7 0.8 0.9 24v in 12v in 36v in output current (a) 0.1 65 efficiency (%) 70 80 85 90 0.3 0.5 0.6 1.0 8022 g02 75 0.2 0.4 0.7 0.8 0.9 24v in 12v in 36v in output current (a) 0.1 60 efficiency (%) 65 75 80 85 0.3 0.5 0.6 1.0 8022 g03 70 0.2 0.4 0.7 0.8 0.9 90 24v in 12v in 5v in 36v in output voltage (v) 0 2 input voltage (v) 3 5 6 7 12 9 6 28 4 8022 g04 4 10 11 8 10 v out 2v/div i in 0.2a/div run/ss 5v/div 50s/div 8022 g05 v out 2v/div i in 0.2a/div run/ss 5v/div 50s/div 8022 g06 output current (ma) 0 input current (ma) 300 400 500 600 1000 8022 g07 200 100 0 200 400 800 600 700 800 24v in 36v in 12v in output current (ma) 0 input current (ma) 300 400 500 800 8022 g08 200 100 250 350 450 150 50 0 200 400 600 1000 24v in 36v in 12v in output current (ma) 0 0 input current (ma) 100 300 400 500 400 800 1000 900 8022 g09 200 200 600 600 700 800 24v in 36v in 12v in 5v in
ltm8022 5 8022fd typical performance characteristics output current vs input voltage (output short) bias quiescent current vs load current (t a = 25 c, unless otherwise noted) minimum required input voltage vs output load (8v out ) minimum required input voltage vs output load (5v out ) minimum required input voltage vs output load (3.3v out ) input voltage (v) 0 output current (ma) 2400 2600 2800 40 8022 g10 2200 2000 1600 10 20 30 1800 3200 3000 load current (ma) 0 bias current (ma) 6 8 10 600 3.3v out 1000 8022 g11 4 2 0 200 400 800 12 14 16 5v out 8v out input voltage (v) 0 0 load current (ma) 200 400 600 800 1000 1200 10 20 30 40 8022 g13 25c 85c input voltage (v) 0 0 load current (ma) 200 400 600 800 1000 1200 10 20 30 40 8022 g14 25c 85c input voltage (v) 0 0 load current (ma) 200 400 600 800 1000 1200 10 20 30 40 8022 g15 25c 85c temperature rise vs load (3.3v out ) temperature rise vs load (5v out ) temperature rise vs load (8v out ) load (ma) 0 0 temperature rise (c) 5 10 15 20 25 200 400 600 800 8022 g16 1000 1200 12v in 36v in 24v in load (ma) 0 35 30 25 20 15 10 5 0 600 1000 8022 g17 200 400 800 1200 temperature rise (c) 12v in 36v in 24v in 24v in load (ma) 0 40 35 30 25 20 15 10 5 0 600 1000 8022 g18 200 400 800 1200 temperature rise (c) 36v in 12v in
ltm8022 6 8022fd pin functions v in (bank 1): the v in pin supplies current to the ltm8022s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor of at least 2.2f. v out (bank 2): power output pins. apply the output ? lter capacitor and the output load between these pins and gnd pins. aux (pin f5): low current voltage source for bias. in many designs, the bias pin is simply connected to v out . the aux pin is internally connected to v out and is placed adjacent to the bias pin to ease printed circuit board routing. although this pin is internally connected to v out , do not connect this pin to the load. if this pin is not tied to bias, leave it ? oating. the application information section gives speci? c information about the bias and aux connections bias (pin g5): the bias pin connects to the internal power bus. connect to a power source greater than 2.4v. if the output is greater than 2.4v, connect this pin there. if the output voltage is less, connect this to a voltage source between 2.4v and 16v. also, make sure that bias + v in is less than 56v. run/ss (pin h5): tie run/ss pin to ground to shut down the ltm8022. tie to 2.5v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section. gnd (bank 3): tie these gnd pins to a local ground plane below the ltm8022 and the circuit components. return the feedback divider (r adj ) to this pin. r t (pin g7): the r t pin is used to program the switching frequency of the ltm8022 by connecting a resistor from this pin to ground. the applications information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. minimize capacitance at this pin. share (pin f7): tie this to the share pin of another ltm8022 when paralleling the outputs. otherwise, leave this pin ? oating. sync (pin g6): external clock synchronization input. ground this pin for low ripple burst mode ? operation at low output loads, or connect to a stable voltage source above 0.7v to disable burst mode operation. do not leave this pin ? oating. tie to a clock source for synchronization. clock edges should have rise and fall times faster than 1s. see synchronization in the applications information section. pg (pin h6): open collector output of an internal comparator. pg remains low until the adj pin is within 10% of the ? nal regulation voltage. pg output is valid when v in is above 3.6v and run/ss is high. if this function is not used, leave this pin ? oating. adj (pin h7): the ltm8022 regulates its adj pin to 0.79v. connect the adjust resistor from this pin to ground. the value of r adj is given by the equation, r adj = 394.21/ (v out C 0.79), where r adj is in k 1 .
ltm8022 7 8022fd operation the ltm8022 is a standalone non-isolated step-down switching dc/dc power supply. it can deliver up to 1a of dc output current with only bulk external input and output capacitors. this module provides a precisely regulated output voltage programmable via one external resistor from 0.8v dc to 10v dc . the input voltage range is 3.6v to 36v. given that the ltm8022 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. a simpli? ed block diagram is shown above. the ltm8022 contains a current mode controller, power switching element, power inductor, power schottky diode and a modest amount of input and output capacitance. the ltm8022 is a ? xed frequency pwm regulator. the switching frequency is set by simply connecting the appropriate value resistor from the r t pin to gnd. an internal regulator provides power to the control cir- cuitry. the bias regulator normally draws power from the v in pin, but if the bias pin is connected to an external voltage higher than 2.4v, bias power will be drawn from the external source (typically the regulated output voltage). this improves ef? ciency. the run/ss pin is used to place the ltm8022 in shutdown, disconnecting the output and reducing the input current to less than 1a. to further optimize ef? ciency, the ltm8022 automatically switches to burst mode operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply cur- rent to 50a in a typical application. the oscillator reduces the ltm8022s operating frequency when the voltage at the adj pin is low. this frequency foldback helps to control the output current during start-up and overload. the ltm8022 contains a power good comparator which trips when the adj pin is at 92% of its regulated value. the pg output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pg pin high. power good is valid when the ltm8022 is enabled and v in is above 3.6v. block diagram v in 8022 bd bias aux pg current mode controller v out 10f 4.7pf 4.7h 0.1f 499k sync run/ss share r t adj gnd
ltm8022 8 8022fd applications information table 1. recommended component values and con? guration v in *v out c in c out r adj b ias f optimal (khz) r t(optimal) f max (khz) r t(min) 3.6v to 36v 0.82v 2.2f 247f 1206 13m 2.4v, <16v 250 150k 250 150k 3.6v to 36v 1v 2.2f 200f 1206 1.87m 2.4v, <16v 300 124k 300 124k 3.6v to 36v 1.2v 2.2f 100f 1206 953k 2.4v, <16v 325 113k 325 113k 3.6v to 36v 1.5v 2.2f 100f 1206 549k 2.4v, <16v 375 93.1k 375 93.1k 3.6v to 36v 1.8v 2.2f 68f 1206 383k 2.4v, <16v 450 79k 450 79k 3.8v to 36v 2v 2.2f 47f 1206 324k 2.4v, <16v 475 73.2k 475 73.2k 3.8v to 36v 2.2v 2.2f 47f 0805 274k 2.4v, <16v 525 64.9k 525 64.9k 3.8v to 36v 2.5v 2.2f 47f 0805 226k 2.4v, <16v 575 59.0k 575 59.0k 4.75v to 36v 3.3v 2.2f 22f 0805 154k aux 750 42.2k 750 42.2k 6.8v to 36v 5v 2.2f 4.7f 1206 93.1k aux 1000 29.4k 1050 28.0k 11.5v to 36v 8v 2.2f 4.7f 0805 53.6k aux 1200 23.7k 1600 15.8k 3.6v to 15v 0.82v 2.2f 200f 1206 13m v in 500 69.8k 615 54.9k 3.6v to 15v 1v 2.2f 147f 1206 1.87m v in 615 54.9k 650 49.9k 3.6v to 15v 1.2v 2.2f 100f 1206 953k v in 650 49.9k 750 42.2k 3.6v to 15v 1.5v 2.2f 100f 1206 549k v in 700 44.2k 890 34.8k 3.6v to 15v 1.8v 2.2f 68f 1206 383k v in 800 39.2k 1050 28.0k 3.6v to 15v 2v 2.2f 47f 1206 324k v in 800 39.2k 1100 26.7k 3.6v to 15v 2.2v 2.2f 47f 0805 274k v in 850 36.5k 1200 23.7k 3.6v to 15v 2.5v 2.2f 47f 0805 226k v in 950 31.6k 1350 20.5k 4.75v to 15v 3.3v 2.2f 22f 0805 154k aux 950 31.6k 1725 14.3k 6.8v to 15v 5v 2.2f 4.7f 1206 93.1k aux 1150 25.5k 2400 7.87k 11.5v to 15v 8v 2.2f 4.7f 0805 53.6k aux 1200 23.7k 1900 12.1k 9v to 24v 0.82v 2.2f 247f 1206 13m 2.4v, <16v 375 93.1k 375 93.1k 9v to 24v 1v 2.2f 200f 1206 1.87m 2.4v, <16v 400 88.7k 400 88.7k 9v to 24v 1.2v 2.2f 100f 1206 953k 2.4v, <16v 450 79.0k 500 69.8k 9v to 24v 1.5v 2.2f 100f 1206 549k 2.4v, <16v 575 59.0k 575 59.0k 9v to 24v 1.8v 2.2f 68f 1206 383k 2.4v, <16v 650 49.9k 650 49.9k 9v to 24v 2v 2.2f 47f 0805 324k 2.4v, <16v 700 44.2k 700 44.2k 9v to 24v 2.2v 2.2f 22f 0805 274k 2.4v, <16v 775 41.2k 775 41.2k 9v to 24v 2.5v 2.2f 22f 0805 226k 2.4v, <16v 850 36.5k 850 36.5k 9v to 24v 3.3v 2.2f 22f 0805 154k aux 950 31.6k 1100 26.7k 9v to 24v 5v 2.2f 4.7f 1206 93.1k aux 1150 25.5k 1550 16.5k 11.5v to 24v 8v 2.2f 4.7f 0805 53.6k aux 1200 23.7k 2000 11.3k 18v to 24v 10v 2.2f 2.2f 0805 42.2k aux 1250 22.6k 1450 18.2k 18v to 36v 0.82v 2.2f 247f 1206 13m 2.4v, <16v 250 150k 250 150k 18v to 36v 1v 2.2f 200f 1206 1.87m 2.4v, <16v 300 124k 300 124k 18v to 36v 1.2v 2.2f 100f 1206 953k 2.4v, <16v 325 113k 325 113k 18v to 36v 1.5v 2.2f 100f 1206 549k 2.4v, <16v 375 93.1k 375 93.1k 18v to 36v 1.8v 2.2f 68f 1206 383k 2.4v, <16v 450 79k 450 79k 18v to 36v 2v 2.2f 47f 0805 324k 2.4v, <16v 475 73.2k 475 73.2k 18v to 36v 2.2v 2.2f 22f 0805 274k 2.4v, <16v 525 64.9k 525 64.9k 18v to 36v 2.5v 2.2f 22f 0805 226k 2.4v, <16v 575 59.0k 575 59.0k 18v to 36v 3.3v 2.2f 22f 0805 154k aux 750 42.2k 750 42.2k 18v to 36v 5v 2.2f 4.7f 1206 93.1k aux 1000 29.4k 1050 28.0k 18v to 36v 8v 2.2f 4.7f 0805 53.6k aux 1200 23.7k 1600 15.8k 18v to 36v 10v 2.2f 2.2f 0805 42.2k aux 1250 22.6k 1450 18.2k 4.75v to 32v C3.3v 2.2f 22f 0805 154k aux 700 44.2k 775 41.2k 7v to 31v C5v 2.2f 10f 0805 93.1k aux 1000 29.4k 1075 27.4k 13v to 28v C8v 2.2f 10f 0805 53.6k aux 1100 26.7k 1350 20.5k *running voltage range. please refer to applications information for start-up details.
ltm8022 9 8022fd for most applications, the design process is straight forward, summarized as follows: 1. in table 1, ? nd the row that has the desired input voltage range and output voltage. 2. apply the recommended c in , c out , r adj and r t values. 3. connect bias as indicated. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. if the desired output voltage is not listed in table 1, set the output by applying an r adj resistor whose value is given by the equation r adj = 394.21/(v out C 0.79), where r adj is in k 1 and v out is in volts. verify the ltm8022s operation over the systems intended line, load and environmental conditions. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper- ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and applied voltage and give dependable service. other types, including y5v and z5u, have very large temperature and voltage coef? cients of capacitance. in an application circuit they may have only a small fraction of their nominal capacitance, resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the ltm8022s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the ltm8022 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high per- formance electrolytic capacitor at the output. the input capacitor can be a parallel combination of a 2.2f ceramic capacitor and a low cost electrolytic capacitor. a ? nal precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8022. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the ltm8022 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. frequency selection the ltm8022 uses a constant-frequency pwm architecture that can be programmed to switch from 200khz to 2.4mhz by using a resistor tied from the r t pin to ground. table 2 provides a list of r t resistor values and their resultant frequencies. table 2. switching frequency vs r t value switching frequency (mhz) r t value (k 1 ) 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 187 121 88.7 68.1 56.2 46.4 40.2 34 29.4 23.7 19.1 16.2 13.3 11.5 9.76 8.66 operating frequency tradeoffs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the ltm8022 is ? exible enough to accommodate a wide range applications information
ltm8022 10 8022fd of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce ef? ciency, generate excessive heat or even damage the ltm8022 if the output is overloaded or short-circuited. a frequency that is too low can result in a ? nal design that has too much output ripple or too large of an output cap. the maximum frequency and corresponding r t value at which the ltm8022 should be allowed to switch is given in table 1 in the r t(min) and f max columns, while the recommended frequency and r t value over the given input range is given in the r t(optimal) and f optimal columns. there are additional conditions that must be satis? ed if the synchronization function is used. please refer to the synchronization section for details. burst mode operation to enhance ef? ciency at light loads, the ltm8022 auto- matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the ltm8022 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. in addition, v in and bias quiescent currents are reduced to typically 20a and 50a, respectively, during the sleep time. as the load current decreases towards a no load condition, the percentage of time that the ltm8022 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher ef? ciency. burst mode operation is enabled by tying sync to gnd. to disable burst mode operation, tie sync to a stable voltage source above 0.7v. do not leave this pin ? oating. bias pin considerations the bias pin is used to provide drive power for the internal power switching stage and operate internal circuitry. for proper operation, it must be powered by at least 2.4v. if the output voltage is programmed to be 2.4v or higher, simply tie bias to aux, which is internally tied to v out . if v out is less than 2.4v, bias can be tied to v in or some other voltage source. in all cases, ensure that the applications information maximum voltage at the bias pin is less than 16v and the sum of v in + bias is less than 56v. if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the ltm8022. minimum input voltage the ltm8022 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. for most applications at full load, the input needs to be at least 1.5v above the desired output. in addition, the input voltage required to turn on depends upon how the run/ss pin is tied. as shown in figure 1, it takes more input voltage to turn on if run/ss is tied to v in than if the turn-on is controlled by raising run/ss when v in is in the required operating range. this is shown in figure 1. figure 1. the ltm8022 needs more voltage to start than to run load current (ma) 0 3.0 input voltage (v) 3.5 4.0 4.5 5.0 6.0 200 400 600 800 8022 f01a 1000 5.5 to start to run v out = 3.3v t a = 25c f = 650khz run/ss enabled load current (ma) 0 input voltage (v) 6.0 6.5 1000 8022 f01b 5.5 5.0 200 400 600 800 7.5 7.0 to start to run run/ss enable v out = 5v t a = 25c f = 650khz
ltm8022 11 8022fd applications information load sharing two or more ltm8022s may be paralleled to produce higher currents. to do this, tie the v in , v out and share pins of all the paralleled ltm8022s together. synchronize the ltm8022s to avoid beat frequencies if required. to ensure that paralleled modules start up together, the run/ss pins may be tied together, as well. if the run/ss pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. an example of two ltm8022 modules con? gured for load sharing is given in the typical applications section. soft-start the run/ss pin can be used to soft-start the ltm8022, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc ? lter to create a voltage ramp at this pin. figure 2 shows the start-up and shutdown waveforms with the soft-start circuit. by choos- ing an appropriate rc time constant, the peak start-up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply at least 20a when the run/ss pin reaches 2.5v. synchronization the internal oscillator of the ltm8022 can be synchronized by applying an external 250khz to 2mhz clock signal to the sync pin. the resistor tied from the r t pin to ground should be chosen such that the ltm8022 would free run 20% lower than the intended synchronization frequency (see frequency selection section). when the ltm8022 is synchronized to an external clock source, burst mode operation is disabled. the part will skip power switching cycles as necessary to maintain regulation. ensure that the sync pin is not left ? oating. tie it to gnd if not used. shorted input protection care needs to be taken in systems where the output will be held high when the input to the ltm8022 is absent. this may occur in battery charging applications, or in battery backup systems where a battery or some other supply is diode ored with the ltm8022s output. if the v in pin is allowed to ? oat, and the run/ss pin is held high (either by a logic signal or because it is tied to v in ), then the ltm8022s internal circuitry will pull its quiescent current through its internal power switch. this is ? ne if your system can tolerate a few milliamps in this state. if you ground the run/ss pin, the internal switch current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the ltm8022 can pull large currents from the output through the v in pin. figure 3 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. figure 2. to soft-start the ltm8022, add a resistor and capacitor to the run/ss pin figure 3. the input diode prevents a shorted input from discharging a back-up battery tied to the output. it also protects the circuit from a reversed input. the ltm8022 runs only when the input is present 8022 f02 i l 0.5a/div v run/ss 2v/div v out 2v/div run/ss gnd 0.22f run 15k 2ms/div ltm8022 8022 f03 v in v out run/ss v in sync pg bias aux v out r t gnd adj
ltm8022 12 8022fd pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8022. the ltm8022 is nevertheless a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve speci? ed operation with a haphazard or poor layout. see figure 4 for a suggested layout. ensure that the grounding and heatsinking are acceptable. a few rules to keep in mind are: 1. place the r adj and r t resistors as close to their respec- tive pins as possible. 2. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8022. 3. place the c out capacitor as close as possible to the v out and gnd connection of the ltm8022. 4. place the c in and c out capacitors such that their ground current ? ow directly adjacent or underneath the ltm8022. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8022. 6. use vias to connect the gnd copper area to the boards internal ground plane. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. applications information figure 4. layout showing suggested external components, gnd plane and thermal vias c in r adj r t c out bias run/ss pg sync ltm8022 aux share 8022 f04 v in plane v out plane gnd plane
ltm8022 13 8022fd hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8022. however, these capacitors can cause problems if the ltm8022 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance, in series with the power source, forms an underdamped tank circuit. in this case, the voltage at the v in pin of the ltm8022 can ring to twice the nominal input voltage, possibly exceeding the ltm8022s rating and damaging the part. if the input supply is poorly controlled or the user will be plug- ging the ltm8022 into an energized supply, the input network should be designed to prevent this overshoot. figure 5 shows the waveforms that result when an ltm8022 circuit is connected to a 24v supply through six feet of 24-gauge twisted pair. the ? rst plot is the response with a 2.2f ceramic capacitor at the input. the input voltage rings as high as 35v and the input current peaks at 20a. one method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. in figure 5b an aluminum electrolytic capacitor has been added. this capacitors high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple ? ltering and can slightly improve the ef? ciency of the circuit, though it is likely to be the largest component in the circuit. an alternative solution is shown in figure 5c. a 0.7 1 resistor is added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). a 0.1f capacitor improves high frequency ? ltering. this solution is smaller and less expensive than the electrolytic capacitor. for high input voltages its impact on ef? ciency is minor, reducing ef? ciency less than one half percent for a 5v output at full load operating from 24v. thermal considerations the ltm8022 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the derating curves in the typical performance characteristics section can be used as a guide. these curves were generated by an ltm8022 mounted to a 33cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. the junction to air and junction to board thermal resistances given in the pin con? guration diagram may also be used to estimate the ltm8022 internal temperature. these thermal coef? cients are determined per jesd 51-9 (jedec standard, test boards for area array surface mount package thermal measurements) through analysis and physical correlation. bear in mind that the actual thermal resistance of the ltm8022 to the printed circuit board depends upon the design of the circuit board. the die temperature of the ltm8022 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8022. the bulk of the heat ? ow out of the ltm8022 is through the bottom of the module and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, resulting in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. finally, be aware that at high ambient temperatures the internal schottky diode will have signi? cant leakage current (see typical performance characteristics) increasing the quiescent current of the ltm8022. applications information
ltm8022 14 8022fd + ltm8022 4.7f v in 20v/div i in 10a/div 20s/div v in closing switch simulates hot plug i in (5a) (5c) low impedance energized 24v supply stray inductance due to 6 feet (2 meters) of twisted pair + ltm8022 4.7f 0.1f 0.7 v in 20v/div i in 10a/div 20s/div danger ringing v in may exceed absolute maximum rating (5b) 8022 f05 v in 20v/div i in 10a/div 20s/div + ltm8022 4.7f 22f 35v ai.ei. + figure 5. a well chosen input network prevents input voltage overshoot and ensures reliable operation when the ltm8022 is connected to a live supply applications information
ltm8022 15 8022fd 2.5v step-down converter typical applications C5v at 1a positive-to-negative converter ltm8022 8022 ta04 v in * 3.8v to 36v v out 2.5v 1a 2.2f 47f run/ss v in share pg aux bias v out 226k 59k 3.3v r t gnd sync adj *running voltage range. please refer to applications information for start-up details ltm8022 8022 ta05 v in * 7v to 31v v out C5v run/ss aux in share bias pg out 93.1k 29.4k r t gnd sync adj 2.2f 10f optional schottky clamp *running voltage range. please refer to applications information for start-up details input voltage (v) 0 0 load current (ma) 200 400 600 800 1000 1200 10 20 30 40 8022 ta05b C5v at 1a positive-to-negative converter load current vs input voltage 1.8v step-down converter 0.82v step-down converter ltm8022 8022 ta02 v in * 3.6v to 15v v out 0.82v 1a 2.2f 200f run/ss v in share pg aux bias v out 13m 69.8k r t gnd sync adj *running voltage range. please refer to applications information for start-up details ltm8022 8022 ta03 v in * 3.6v to 15v v out 1.8v 1a 2.2f 68f run/ss v in share pg aux bias v out 383k 39.2k r t gnd sync adj *running voltage range. please refer to applications information for start-up details
ltm8022 16 8022fd typical applications two ltm8022s in parallel, 3.3v at 1.8a ltm8022 v in * 5.5v to 36v v out 3.3v 1.8a run/ss aux in share bias pg out 78.7k 43.2k optional sync rt gnd sync adj 2.2f 10f ltm8022 8022 ta06 run/ss aux in share bias pg out 43.2k r t gnd sync adj 2.2f *running voltage range. please refer to applications information for start-up details note: syncronize the two modules to avoid beat frequencies if required. otherwise, tie each sync to gnd
ltm8022 17 8022fd package description lga package 50-lead (11.25mm 9.00mm 2.82mm) (reference ltc dwg # 05-08-1804 rev b) notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 and spp-020 5. primary datum -z- is seating plane 6. the total number of pads: 50 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or a marked feature symbol aaa bbb tolerance 0.15 0.10 9.00 bsc package top view lga 50 0507 rev b 11.25 bsc 4 pad 1 corner 3 pads see notes x y aaa z aaa z 2.72 ?2.92 detail a package side view detail a substrate mold cap 0.27 ?0.37 2.45 ?2.55 bbb z z 1.27 bsc 0.605 ?0.665 0.605 ?0.665 8.89 bsc 7.62 bsc c(0.30) pad 1 hba dc 6 7 5 1 2 3 4 e f package bottom view package in tray loading orientation g 4.445 4.445 3.175 3.175 1.905 1.905 0.000 0.635 0.635 3.810 3.810 0.9525 0.635 0.3175 2.540 2.540 1.270 1.270 0.000 0.3175 0.3175 suggested pcb layout top view ltmxxxxxx module tray pin 1 bevel
ltm8022 18 8022fd package description table 3. ltm8022 pinout (sorted by pin number) pin signal description pin signal description a1 v out d5 gnd a2 v out d6 gnd a3 v out d7 gnd a4 v out e1 gnd a5 gnd e2 gnd a6 gnd e3 gnd a7 gnd e4 gnd b1 v out e5 gnd b2 v out e6 gnd b3 v out e7 gnd b4 v out f5 aux b5 gnd f6 gnd b6 gnd f7 share b7 gnd g1 v in c1 v out g2 v in c2 v out g3 v in c3 v out g5 bias c4 v out g6 sync c5 gnd g7 r t c6 gnd h1 v in c7 gnd h2 v in d1 gnd h3 v in d2 gnd h5 run/ss d3 gnd h6 pg d4 gnd h7 adj
ltm8022 19 8022fd information f rnished by linear technology corporation is believed to be acc rate and reliable. however, no responsibility is ass med for its se. linear technology corporation makes no representa- tion that the interconnection of its circ its as described herein will not infringe on existing patent rights. revision history rev date description page number d 8/10 added note 5 3 (revision history begins at rev d)
ltm8022 20 8022fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2008 lt 0810 rev d ? printed in usa related parts typical application part number description comments ltm4600/ltm4602 10a and 6a dc/dc module pin compatible, 4.5v v in 28v ltm4601/ltm4603 12a and 6a dc/dc module pin compatible; remote sensing; pll, tracking and margining, 4.5v v in 28v ltm4604/ltm4608 4a, 8a low voltage dc/dc module 2.375v v in 5.5v, 9mm 15mm 2.3mm (ltm4604), 9mm 15mm 2.5mm (ltm4608) ltm4605/ltm4607 buck-boost dc/dc module up to 160w, external inductor; high ef? ciency (up to 98%), 15mm 15mm 2.8mm lga ltm8020 200ma, 36v dc/dc module 4v v in 36v, 1.25v v out 5v, 6.25mm 6.25mm 2.32mm lga ltm8023 2a, 36v dc/dc module 3.6v v in 36v, 0.8v v out 10v, 11.25mm 9mm 2.82mm lga, pin compatible with ltm8022 3.3v step down converter ltm8022 8022 ta07 v in * 4.75v to 36v v out 3.3v 1a run/ss aux in share bias pg out 154k 42.2k r t gnd sync adj 2.2f 22f *running voltage range. please refer to applications information for start-up details

▲Up To Search▲

Price & Availability of LTM8022EVPBF

	To Download LTM8022EVPBF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .